The present invention generally relates to a method for fabricating solder interconnections between semiconductor chips and chip carriers and, more particularly, to a dual-solder method for fabricating a flip-chip solder structure which will enable a larger variety of solders for wafer bumping.
C4 (Controlled Collapse Chip Connection) technology is a means of connecting integrated circuit chips to substrates or chip carriers in electronic packages. It is a flip-chip technology in which the interconnections are small solder balls on the chip surface with a high density area array. The top layers of the integrated circuit chip are wiring levels, separated by insulating layers of dielectric material that provide input/output for the device.
In C4 structures, the chip wiring is terminated by a plurality of metal films that form the ball-limiting metallurgy (BLM). The BLM defines the size of the solder bump after reflow, provides a surface that is wettable by the solder and that reacts with the solder to provide good adhesion and acceptable reliability under mechanical and thermal stress, and is a barrier between the integrated circuit device and the metals in the interconnection.
Certain applications, such as lead-free flip-chip solder bumps, require multi-component solder alloys, i.e., ternary, quaternary, or greater. Such solder alloys can be very difficult to electroplate from solution. On the other hand, the electroplating solder bumping process may afford specific advantages to certain applications, with respect to bump count per unit area, low stress barrier layers, etc.
The Injection Molded Solder (IMS) process, by directly depositing molten solder from a supplied solid solder alloy, is very amenable for the deposition of multi-component solder alloys. However, the current IMS process is typically for the solder deposition only and requires that all metal layers of the BLM (adhesion, barrier, wettable) be deposited by other means.
To solve the problem of electroplating multi-component alloys, one can sequentially plate each individual component of the solder alloy. However, precise relative compositions obtained by this means may be difficult to obtain, especially if some of the components are at low or trace levels. Furthermore, sequential plating is only practical for two or three components and would be very difficult to achieve for quaternary alloys or higher. The present invention, by using melting and direct deposition in liquid form of a solid solder alloy obtained by normal manufacturing means, can accommodate solder alloys with any number of components, including low or trace quantities. The present invention can therefore also accommodate certain components that would be difficult or impossible to electroplate at all, while still maintaining the advantages of the electroplating process and any electroplating tooling and infrastructure.
In an alternative method, others are avoiding electroplating altogether by means of screening multi-component solder paste directly on a sputtered BLM (IMS alone could also be used in this manner). There are limitations in the thickness of sputtered layers that, when exceeded, may cause excessive stresses on the underlying substrate/wafer. Such thicknesses, specifically for the barrier layer, may not be sufficient for particular solder alloys. The electroplating portion of this invention permits a lower stress (per given thickness) electroplated barrier metal to be deposited. The electroplating portion of this invention, by sequentially plating the barrier layer and the wettable solder layer, also provides a very clean barrier-to-solder interface and an easy solder-to-solder reflow soldering interface, as opposed to paste screening or IMS alone, which must reflow solder directly to the sputtered BLM. There are also limitations in bump density (quantity of bumps per unit area) with some of the alternatives (e.g., paste screening). The combination of electroplating and IMS in the present invention is capable of higher bump densities than such alternatives.
Accordingly, it is a purpose of the present invention to provide a means to effectively deposit multi-component solders while remaining essentially compatible with the base electroplating solder bumping process (BLM deposition, BLM patterning, etc.) thereby encompassing the aforementioned advantages of electroplating and remaining compatible with an electroplating solder bumping infrastructure (equipment, skills, etc.) A flip-chip solder bump is formed by first using known electroplated solder bump technology, with the difference being that only a small wettable layer of metal or solder (eg. pure Sn) is deposited; subsequent to completion of this electroplating bumping process, the remainder of the required solder volume is deposited by Injection Molded Solder (IMS) technology.
It is another purpose of the present invention to accommodate trace amounts of alloying that would be difficult or impossible to electroplate.
It is another purpose of the present invention to accommodate certain metals that would be difficult or impossible to electroplate.
It is another purpose of the present invention to provide a means for electrical test between deposition of the wettable layer of solder and the bulk solder, providing the advantages of a more planar surface for probe contact, with very consistent height, less solder pick-up by the test probe and elimination of the post-probe solder reflow step.
These and other purposes of the present invention will become more apparent after referring to the following description considered in conjunction with the accompanying drawings.